Hardware

1. QCDPAX system consists of a host computer and PU(Processing Unit) array.
2. One cabinet includes six modules.
3. One module includes 16 PUs and a interface board.
4. A PU board includes CPU, FPU, SRAM, DRAM, and so on.

QCDPAX project was conducted under the Grant-in-Aid for Specially Promoted Research of the Ministry of Eduation, Science and Culture of Japanese goverment. Fund of this project was 330M yen (about 2.2M US$). At first, prototype QCDPAX-4 with 4 PU was made in 1988. In 1989, one module with 16 PU was tested, and then QCDPAX with 288 PU was made and start QCD simulation. In 1990, QCDPAX was increased with PU number to 480. These QCDPAX are constructed by Anritsu Co..