Papers published from Center for Computational Physics, University of Tsukuba
/Computer Science
/Papers on High Performance Processor Architecture
/
journal papers (refereed) in English
Augmenting Loop Tiling with Data Alignment for Improved Cache Performance
- Authors: P.R. Panda, H. Nakamura, N.D. Dutt, and A. Nicolau
- Published: IEEE Transactions on Computers, Vol.48, No.2, pp.142-149,
- Date: February, 1999
Reducing Memory System Energy by Software-Controlled On-Chip Memory
- Authors: M.Kondo and H.Nakamura
- Published: IEICE Trans. on Electronics, Vol.E86-C , No.4, pp.580-588,
- Date: April, 2003
Finding Unique PCR Products on Distributed Database
- Authors: K.Kurata, V.Breton, and H.Nakamura
- Published: IPSJ Trans. on Advanced Computing Systems, Vol.44 No.SIG6 (ACS1), pp.34-44,
- Date: 2003